The present invention relates generally to high current density access devices, and more particularly, to a structure and method of forming tunable voltage margin access diodes using layers of mixed ionic-electronic conduction (MIEC) materials.
In order to increase the density of memory technologies (both volatile and nonvolatile), a crosspoint design is typically preferred. In such an optimized design, the wordlines and bitlines (hereafter referred to as memory lines) run at minimum pitch=2F, where F refers to the lithographic minimum feature size (for example, 32 nm), and storage elements are placed between these perpendicularly oriented memory lines at their crosspoints.
Two device components are needed at the crosspoint of the memory lines: (a) a memory element and (b) a rectifying diode or access device (AD). The memory element refers to an element that is used to store data/information. Many options exist here, including, for example, phase change memory (PCM), MRAM, Resistive RAM (RRAM), solid electrolyte memory, FeRAM, etc. The rectifying element or AD is needed because a transistor is usually not provided at every crosspoint, so a device is needed to rectify current (i.e., exhibit nonlinearity). This ensures that the memory cells that lie on unselected wordlines and bitlines are not inadvertently programmed or shorted to each other and do not leak any significant amount of current.
The quality of single-crystal silicon p-n and Schottky diodes that can be fabricated in middle-of-line (MOL) or back end of line (BEOL) lower temperature processes is typically very low since they have to be made in amorphous or polycrystalline silicon that has much lower mobility. This may prevent the use of p-n junctions in either single-crystal silicon or other silicon materials as rectifiers for high-current memory elements (especially in 3D applications).
Instead of using single-crystal silicon p-n and Schottky diodes as ADs at the crosspoint of the memory lines, solid electrolyte (SE) diodes may be used. The advantage of this approach is the high ON/OFF ratio, as the SE can provide very high currents in the ON state (since it has a metallic filament that bridges the two electrodes) and very low OFF currents. However, disadvantages with this approach include: the need for an explicit erase step to erase the filament, wherein such an erase step can be quite slow (for example, hundreds of microseconds are needed to erase a thick filament); the low reliability/endurance of the SE element during high current programming; and the very low OFF current actually being near or below a noise floor current in some devices.